ASIC / System-on-a-Chip

The ASIC Design Start landscape has changed since 2006 to accommodate increasing design costs, rising design complexity and lengthening design cycle times, especially in the System-on-a-Chip (SoC) market. These changes are having an impact on the ASIC Design Start market as the broader semiconductor market has mostly recovered from the financial meltdown that occurred in the 3rd quarter of 2008 and into the first part of 2009.

Today, everywhere we turn, we hear speakers give presentations at conferences and industry events despairing how the rise in silicon design costs hampers the semiconductor industry's growth path. As part of this problem, we now recognize that software design costs have eclipsed silicon design efforts and have become the largest portion of the SoC creation effort.

As the semiconductor industry enters the second decade of the 21st Century, substantial changes to the System-on-a-Chip (SoC) design methodology are taking shape. These changes reflect issues the industry has been discussing for the last 5-6 years that are adversely affecting the SoC design effort to an ever-greater degree:
• Rising design costs
• Increasing design complexity
• Shrinking market windows
• Lengthening design cycle times
• Rapidly changing market requirements
• Escalating integration costs for Semiconductor

The ASIC Design Start landscape has changed in the last three or four years starting with 2006 and continuing through today.  The market landscape has changed to accommodate increasing design costs, rising design complexity and lengthening design cycle times, especially in the System-on-a-Chip (SoC) market.