The only semiconductor market segment that has not been taken over by the foundries and still remains dominated by IDMs is the memory sector. The memory market is the last bastion for true IDM manufacturers who must be savvy in the changing trends in end market applications, advanced technology development , and must still determine how much and when to invest in additional capacity.
With only four major players, the decision of when to add capacity should be more straightforward; instead, it’s just as challenging as ever. Large memory fabs are inherently more expensive and riskier than ever.
At their Winter Analyst Meeting on February 12th, Micron’s executives touched on a number of trends that memory manufacturers are addressing.
• Shifting end markets: no longer dominated by the PC market, servers, networking and automotive are the focus areas for future growth.
• No longer a commodity: new applications and new memories have created a more customized, system approach to memory solutions which have de-commoditized the DRAM and NAND markets. Memory manufacturers must offer more options and carry a more diversified product portfolio.
• Bit growth is slowing: both DRAM and NAND are expected to experience bit growth rate declines over the next two years. Technology transitions will take care of most of the DRAM bit growth, but due to a greater than 40% expected bit growth rate for NAND, capacity will have to be added.
• Transitions to new technology: 3D NAND and other new memory technology is becoming a ‘must-have’ in order to continue scaling.
Technology transitions are not always a guaranteed success. Micron was not the first attendee to the 3D NAND party, but they are bringing a unique product with them. Micron’s 3D NAND technology structure places the CMOS circuitry under the memory array enabling a more compact die, thus achieving 20% reduction in cost over their 16nm planar option. Over the next year, Micron will be focused on the deployment of their 2nd generation 3D NAND which is expected to provide a 30% cost reduction over Gen 1.
So with all this scaling, cost reduction, and flat-to-down PC market, shouldn’t it be easy to determine when and how much capacity should be added? Unfortunately, even as Memory Lane narrows down to only a few major players, the remaining players aren’t traveling as best friends. There are fewer competitors to scrutinize and no reason to intentionally flood the market with cheap products. But there continue to be so many other internal and external unexpected market factors that could affect the planned route.
How will the buyout of SanDisk affect the market supply situation? That analysis is worthy of an entire blog of its own. Semico’s short answer is that it will actually provide more opportunities for the remaining IDMs. The capacity and R&D investment is not something that SanDisk’s new owner is accustomed to or expected to buy into.
DRAM is not going to require a significant amount of capacity investment and all the players seem to agree on that. The risks associated with overcapacity have modified the mindset from a capacity expansion mode to a focus on managing the market and profitability. That strategy certainly worked in 2013 through most of 2015.
How much capacity to add in the transition for next generation 3D NAND is the wildcard. Micron is expected to add some NAND capacity over the next two years and Samsung is building a $15 billion fab that is expected to start ramping in the second half of 2017. That will likely be a NAND fab. Toshiba is also bringing online a new fab to add capacity for the 3D NAND transition. Will this lead to too much NAND capacity?
3D NAND offers a bonus lower cost per bit, which is good news for the overall industry as NAND is still a very price-elastic market. Micron expects a bit increase per wafer of 140-150% triggering a cost per bit decline of 65-75% over the next 2 years. Semico believes the cost reductions will be industry-wide and will stimulate more robust end applications. OEMs with access to higher performance, cost effective memory solutions for storage intensive applications will certainly find ways to creatively apply the technology. The result could be a memory lane that looks more like a highway.