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October 2007

Semico: System(s)-on-a-Chip – A Braver New World

Semico Roadmap for Die Area Partitioning 1999 - 2017 - Source: Semico Research Corp.

Phoenix, Arizona October 24, 2007 - The System-on-a-Chip (SoC) method of creating silicon solutions holds great promise for the future of the semiconductor industry and ASIC markets in particular. Semico Research forecasts the revenue for the SoC market will grow from $37.4 billion in 2007 to over $56 billion in 2012, a compounded annual growth rate approaching 9%.

Semico: Executive Briefs - The 3 C’s: Computing, Consumer and Communication

Phoenix, Arizona October 18, 2007 - When reviewing the end-user market segments, the computing segment is the largest segment representing 60% of total worldwide semiconductor revenues. Computing, one of the 3 C’s, will grow to approximately $614 Billion in 2011. “While Computing is the largest segment, the Consumer segment, another one of the 3 C’s, will have the highest growth rate. The semiconductor content found in the consumer end-user market segments are forecasted to grow over 26% in 2007 versus last year.

Nineteen Electronics Industry Leaders Join Forces to Accelerate SOI (Silicon-On-Insulator) Innovation Into Broad Markets

SOI Industry Consortium Aims to Reduce Costs, Reach New Markets

BOSTON, MA October 8, 2007 - A group of leading companies throughout the electronics industry today announced the launching of the SOI Industry Consortium, aimed at accelerating silicon-on-insulator (SOI) innovation into broad markets by promoting the benefits of SOI technology and reducing the barriers to adoption.

FBDIMM Not Being Extended to DDR3

The Intel Developers Forum is naturally focused on processor related topics, but the close tie between the processor performance and the memory configuration means that there are always some important memory topics that are presented. The memory topic of highest interest this year was the resolution of fully buffered DIMM for DDR3.

Power consumption related to both the processing function as well as for the cooling of the semiconductor components are both becoming more important. In the overall scheme of a processor’s architecture, the way in which the processor uses the various memory elements as well as the coordination between the memory and the processor is critical to the overall cost and performance of the system design. The system-level design objectives impact many of those architectural considerations.

One of Intel’s design objectives relative to DRAM memory features was the ability to extend the capacity of the memory for high-performance applications with as little disruption to the architecture as possible. In order to support that objective, Intel supported Fully Buffered DIMM (FBDIMM) and the Advanced Memory Buffer (AMB) that was required on each of the modules.

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