New Directions in the EDA Market: Designing with AI Tools

To combat rising SoC design costs and increasingly complex software applications, a solution has been developed:  the incorporation of AI functionality into existing EDA tools as an aid to silicon and software designers. A new report from Semico Research, Designing New Directions in the EDA Market: Designing with AI Tools (SC109-20) projects that cost savings from using AI EDA tools for SoC designs ranges from 20% to 30%.
In a unique, insightful look at this constantly evolving market, Semico Research's new report examines the impact of AI on chip design and is segmented into three parts:

• Part One: Briefly details the rise in device complexity for SoC designs of all types and gives relevant industry metrics to gauge issues and progress.
• Part Two: Details the current state-of-the-art features in EDA tools and focuses on tools with some level of AI functionality.
• Part Three: Takes primary and secondary research that Semico has developed over the years and walks through a representative SoC design from the standpoint of design costs, market size, return on design investment, unit volumes, revenues and profitability.

Key findings of the report include the following:

• Semico forecasts the penetration rate of tools with AI functionality into the EDA market will reach 46.8% by 2025, a CAGR of 44.1%.
• Currently, the penetration rate is 6.2%, but will grow quickly as the industry transitions from add-on AI modules to fully featured AI EDA tools.
• Use of AI-enabled tools allowed a reduction of 21.3% on a representative SoC design at 14nm.
• AI-enabled EDA tools can be used on older geometries, but savings may be less due to lower overall levels of design effort needed to accomplish the design.