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The rise in applications demanding increased connectivity and portability have converged to offer new opportunities for mixed signal ASICs. This has come primarily in the form of adding mixed signal functionality to what had been all-digital System-on-a-Chip (SoC) designs. This trend has also impacted the programmable logic market, most notably Field Programmable Gate Arrays (FPGAs) where high speed Serializer-Deserializer (SerDes) channels have been added to facilitate high speed communications channels.

The current global slowdown in economic conditions is having an adverse impact on the design start universe for ASICs. This can be seen in the slowing of design start activity towards the end of 2008 and forecast for all of 2009. Semico believes 2010 will see a recovery in design activity back to more historical norms. An in-depth perspective on these impacts is provided by showing a comparison between design starts for SoCs and all other types of ASICs and the continuing increase in SoC design costs.

The 3rd Party Semiconductor Intellectual Property (SIP) market grew at just a 4.8% rate in 2008 as the global economic situation affected every part of the semiconductor market. This growth rate is much lower than historical trends and is forecast to extend into 2009 with only a 2.9% increase. However, the low growth rate for this year is a testament to the overall importance and strength of SIP as most other market segments are declining today.

Semico Research, in conjunction with Advance Tech Marketing, announced today a new series of reports that offers unique information, market data, and insights as the semiconductor industry continues to transition to System-on-Chip (SoC) style methodologies for chip development.