You are here

System(s)-on-a-Chip: A Change in SoC Design Methodology

SKU: SC102-10

The SoC market experienced negative revenue for the first time in 2009 since the market was first tracked in 1998. Total market revenues declined 19.2% in 2009 in response to weak end-market unit demand and increasing pressure on device ASPs. However, the market is recovering strongly in 2010 as market demand solidifies. Revenue for this market will grow from $45,294M in 2010 to $69,405M by 2015, a CAGR of 8.9%.

The gap between time-to-market and design completion has been lengthening for the last few years. Just as design cycle times have lengthened, product life cycles have become shorter. It is estimated that the time to design fairly complex SoC silicon is twelve to sixteen months, and a typical product life cycle length at just nine months. The SoC methodology is seen as a way to bring this process under control once again. However, increasing capability in terms of gate counts on the process side, and the impact this has on allowing greatly enhanced functionality and feature sets in the end system, is preventing substantial inroads from being made on shortening design cycle times. However, the ability to re-use existing Semiconductor Intellectual Property (SIP) blocks over the course of many SoC designs is one way to reduce the design time.

The willingness of established silicon manufacturers to solicit and acquire SIP from 3rd party sources for incorporation into a currently running design or into their SIP libraries – all to service their SoC customers better is increasing, especially at companies who have previously believed it was better to create their own SIP internally. The advent of ‘Mega-blocks’; blocks of different SIP functions integrated together into more tightly coupled, higher-performing functions, and then the evolution of these mega-blocks into true sub-systems is leading SoC designers to adopt a new approach to SoC design. In effect, SoC designers must now become system integrators when crafting their solutions and can no longer function only in the role of creating silicon solutions if they want to take full advantage of the evolution occurring in the SIP market.

SoC is more of a methodology than a separate piece of silicon. Many current manufacturers of older, pre-existing designs of MCUs (Microcontrollers), MPRs (Microperipherals), and ASSPs (Application Specific Standard Products) will take advantage of the new ease of design SoC offers and choose to redefine/redesign these products. These products, along with the traditional types of SoC, are starting to employ the new design methodology inherent in the IP Subsystem approach to cut design costs and reduce design cycle times, while increasing functionality and performance.

In this way, the market is embracing a new methodology to designing SoCs that will allow new types of silicon solutions to be created and employed by end system designers throughout the electronics market.

Table of Contents: 

For pricing and additional information contact Rick Vogelei at (480) 435-8564 or email him.