Basic SoC Design Starts CAGR will grow 16.4%, Says Semico Research

Today, silicon designs show rapidly increasing levels of complexity in response to end user demands for more connectivity and the ability to use that connectivity in applications like downloading video, video conferencing, device hot spots, increasing camera resolution for richer photos and better screen resolution to enhance user experience.   

An additional trend is to include sensors of every type for a better interface and interaction with the outside world. All these features come at a cost which is increased device complexity.  New Semico Research, ASIC Design Starts: Growth Continues as Markets Strengthen, states that despite device complexity, design start activity CAGR will increase 4.8% from 2013-2018.

"The drive towards offering increased connectivity options to end users in many market segments,  and the need to corresponding increase the computational resources in support of the more robust connectivity options, is pushing device complexity levels to new heights," said Rich Wawrzyniak, Sr. Market Analyst.  "The increase in device complexity also has a great impact on the 3^rd Party IP market and ultimately on ASIC design costs as designers strive to meet rising market expectations and requirements. This in turn pushes the need for new silicon solutions and the rise in ASIC Design Starts is a reflection of this"

New research findings include:

• Advanced Performance Multicore SoCs gate count is increasing at a CAGR of 19.5% from 2013-2018.

• Value Multicore SoC's CAGR will be 22.2%

• 1^st time SoC design efforts are also increasing in 2014 at a 5.2% rate

• Overall CAGR for average complexity levels is 19.4% for all ASIC types measured in the study.

This report, ASIC Design Starts: Growth Continues as Markets Strengthen, contains comprehensive data regarding current and future ASIC design start landscape.  The report is 95 pages with 60 tables and 66 charts covering the following key metrics:

End market applications:

• Computer
• Consumer
• Communications
• Industrial and Automotive

ASIC product types analyzed by design starts with unit shipments for:

• Analog and Mixed Signal
• 3 SoC types
• FPGAs and PLDs
• Gate Array and Structured ASIC

Design Starts for the 9 ASIC Product types by

• Process Geometry
• Region
• Design Complexity

Two years of history (2012 -2013) and a 5-year forecast (2014 - 2018)

Related Semico Research:

• ASIC Design Starts: New Growth Ahead 
• IP Subsystems: The Race is On 
• Licensing, Royalty and Service Revenues For 3rd Party SIP: A Market Analysis and Forecast for 2013
• System(s)-on-a-Chip: Changes in SoC Design Methodology  

For More information, contact Rick Vogelei.
Phone: (480) 435 - 8564
Email: rickv@semico.com