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May 2007

Intel and STMicroelectronics Shake up the NOR Market

Michell Prunty's picture
published by Michell Prunty on Wed, 2007-05-30 18:31

On May 22, 2007, STMicroelectronics, Intel, and Francisco Partners announced an agreement to create a new memory company. This company will combine Intel’s NOR assets with ST’s NOR and NAND business with the financial acumen of Francisco Partners.

Rumored to be in the works for months, the new company combines the NOR revenues of the number two and three players in the market to take the top position away from Spansion. However, Spansion hopes to benefit from the new competition. Intel and ST’s NOR businesses, like others in the market, have not been profitable for some time.

Without the deep pockets of the larger companies, the new company won’t be able to compete with the heavily discounted prices seen recently in the NOR market. It’s possible that the consolidation will help Spansion turn a profit, once prices rise back to normal levels. They are very well positioned for profitability with the 300mm SP1 facility in Japan coming online and a host of cost-cutting initiatives already in motion.

There has been a need for consolidation in this industry for some time. Semico believes that between the Intel/ST venture and Samsung gunning for domination, there will be some smaller manufacturers who will either drop out of the market altogether or will sell off their NOR businesses to one of the larger companies.

Renesas Presents Future MCU Roadmap

Michell Prunty's picture
published by Michell Prunty on Wed, 2007-05-30 18:30

This week Renesas presented the technology roadmap for a new MCU architecture. At this time this is more of a pre-announcement. The company expects the specification to be complete by 2Q 2008 and first samples will be available by 2Q 2009.

When Hitachi and Mitsubishi merged their semiconductor operations to form Renesas a few years ago it became the number one MCU vendor for 16-bit and 32-bit MCUs. This was the result of combining the H8S/SX and the M16C/32C families. Renesas management promised to support both product lines equally. In the ensuing years this promise appears to have been kept.

Renesas is now looking to further solidify its position in high end MCUs. The new MCU architecture will in fact be a merger of the H8S/SX and the M16C/32C families. The goal will be to make this new 16-bit and 32-bit MCU architecture be compatible with the company’s existing MCU families. Renesas will offer a unified peripheral set. Both application specific and general purpose versions will be offered. There is no brand name for this new MCU at this time.

MIPS Offers High Performance For Ever Increasing Demand in Consumer Market

Michell Prunty's picture
published by Michell Prunty on Wed, 2007-05-30 18:30

This week MIPS announced the MIPS32 74K core, a next-generation processor core family offering an innovative embedded microarchitecture. It is the industry’s first fully synthesizable 32-bit processors to achieve operating frequencies greater than 1 GHz in TSMC 65nm process technology.

The MIPS architecture has a dominant position in high end consumer electronics, in particular DTV, Set top box, IPTV, DVD players/recorders (including Blu-Ray and HD DVD), residential gateways and VoIP. These applications are also part of the convergence trend of communications and CE. These and other emerging applications are driving the demand for increasing performance, as well as lower system costs and low power consumption. The 1 GHz performance cited by MIPS is critical.

Also important for SoC designers is that the 74Kcore family is designed to work with generic standard cells, memories and EDA design flows. It is compatible with the software and system interfaces of other well established MIPS32 cores 24K, 24KE and 34K™ processors.

Some the technical features of note are:

Klocwork Static Analysis Programs: Someone to Watch over You

Michell Prunty's picture
published by Michell Prunty on Fri, 2007-05-04 18:29

If you were an embedded systems software engineer, a very smart assistant who could check programs for you would be invaluable. Embedded systems are designed to perform a very specific and limited array of functions in systems ranging from consumer handheld devices to complex machine tools.

Because changing embedded software is relatively expensive, it is critical that the software is right the first time. A smart assistant would check your program to make sure that there were no errors. Klocwork, a Burlington, Massachusetts company, has developed static code analysis programs that are, in effect, that smart assistant.

Klocwork’s K7 is defined as providing static analysis because the code does not need to be run for the analysis to occur. Static analysis is a procedure for analyzing source code to gain an understanding of what the software does and to establish correctness criteria.

The programs can then check the software for defects and security vulnerabilities. This occurs at "Time Zero," directly as the developer is creating the code, before it is submitted for check-in or integration/system build and long before QA is engaged on the system. The static analysis program performs the function of a very skilled code review team.

Intel and AMD 1Q 2007 Results; What Does It Mean After The Smoke Has Cleared?

Michell Prunty's picture
published by Michell Prunty on Thu, 2007-05-03 18:28

Last week Intel and AMD reported their 1Q 2007 financial results which were widely covered. What is the significance of these results and what does it portend for the coming year and beyond?

A brief review

Intel reported corporate revenues of $8.852 B, down 9% q to q and down 1% y-over y. The MPU revenues were $6.0 B, down 8% q to q and down 4% y-over-y. The company attributed the drop to lower unit shipments, which was expected for the seasonality of the PC market. Intel noted that the ASPs for desktop and mobile were flat, but overall ASPs for servers were lower due to a mix of more low-cost single and dual processor systems.

Things were tougher at AMD. The company reported total revenues of $1.233 B down 30% q to q and 7% y-over-y. AMD now includes revenues from ATI which was acquired during 2006, so the drop for AMD’s MPU business is more significant. The computational products group (MPU and chipsets) had revenues of $918 million, compared to previous quarter of $1,486 (some ATI business) and $1,337 in 1Q06 prior to the ATI acquisition. Semico estimates that AMD’s MPU revenues in 1Q07 were about $750 million. This is a drop of 45% q-to-q and a drop of 44% y-over-y. AMD attributed this to both a drop in unit shipments and a drop in ASPs.

Semico Spin

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