May 2012

Semico held its Impact conference: Focus on the IP Ecosystem at the DoubleTree Hotel in San Jose, CA on May 16^th,2012.  The day before, on May 15^th, Cadence Design Systems announced its first IP Subsystem product, a Storage IP Subsystem based around the new NVMe (Non Volatile Memory express) interface standard for flash-based storage applications completed in March, 2011.  This IP Subsystem provides a complete HW / SW verified solution and maximizes the command throughput for interaction between system software and the storage system.

It is intended for those applications that want to replace rotating media in a system with flash-based Solid State Drives (SSD). Vishal Kapoor, Vice President, Marketing Design IP and Services at Cadence gave a presentation at the Semico conference the very next day. He provided some fascinating insights into the forces at work behind the creation of their Storage IP Subsystem.

On Wed May 16, 2012 Warren East, CEO of ARM, gave the opening keynote address at Semico Research Impact Conference: The IP Ecosystem.  Mr. East addressed the issue of IP (Intellectual Property) evolution and growth.  Looking forward there has to be more collaboration in the IP world, both horizontally and vertically.

IP companies need to work closely with chip vendors.  Semiconductor companies want to hold onto what they see as differentiators.  But this may work against lowering development costs.

In the last 20 years ARM has enabled wireless mobility.  The fabless model has lowered costs and spawned the growth of many companies.

IP has value.  Mr. East cited Semico’s projection of $3 Billion in projected IP revenue in 2012, a 25% growth rate.  There are over 100 blocks per chip.

There are increasing demands on chip design.  Today the chip is the system.  The board complexity has moved onto the chip.  Designers have to balance power with performance.  There are optimized processing units designed for specific tasks.

Designers at large IDMs first created their own IP Subsystems out of the discrete IP blocks they were already licensing or had developed internally.  This was done to both reduce the level of effort they were expending to create a certain level of functionality and to increase the performance of these discrete blocks in the design. This process has been occurring for the last 4 – 5 years as a captive activity at several of the larger IDMs around the world.

Now, for the first time, major IP Vendors are starting to offer their own IP Subsystems as products available from the 3^rd Party market to designers at companies of all sizes. The IP Subsystem as a product is the embodiment of the desire by silicon designers to move up a layer of abstraction and to design with system-level functions instead of licensing many discrete IP blocks and aggregating them into the system-level functionality they need for their silicon solutions. By approaching the design flow in this manner, a great deal of time and cost can be removed from the design effort. There are several potential benefits to designers in adopting this approach:

Mahesh Tirupattur, Executive Vice President of Analog Bits, led the panel "Who Wins in the IP Ecosystem?" during the Semico Impact 2012.  Other members of the panel were Suk Lee of TSMC, Jean-Marie Brunet of Mentor Graphics, Tony Stelliga of Intersil, and Dr. Naveed Sherwani of Open-Silicon.

Mr. Tirupattur began the panel by describing today's industry as a collaborative model, where customers tell the IP companies what they want, and what they can do better.  What the industry needs is a dynamic ecosystem that improves efficiency, with no waste or redundancy.  It's not just who wins in the ecosystem, but how do we get paid for the value we bring to the table?