Today's designs are focused on complexity driven by AI functionality and integration of wireless interfaces. They are many times more complex than those from several years ago. This complexity is driving design costs up to higher levels than the industry has previously seen. This change in the ASIC design start landscape represents one of the largest threats to continued increases in ASIC design starts today and in the future. A new report from Semico Research, ASIC Design Starts by Major Market Applications, (SC106-23) states that worldwide ASIC unit shipments increased 8.5% in 2022 while providing in-depth details on the impact the changing landscape has had on design starts.
"The metrics that people usually employ to measure the progress of the SoC industry show that it is becoming increasingly difficult for SoC manufacturers to successfully navigate the obstacle course that is the SoC market. These metrics are well known: rising design and mask set costs, increasing device complexity, rising design cycle times and shrinking market windows," says Jim Feldhan, President, Semico Research. "The convergence of these metrics and their effect on SoC silicon creation has prompted SoC designers to look for other means to craft their silicon solutions in a more efficient manner. This has led to the creation and use of SIP Subsystems by many of the leading semiconductor vendors. Recently the concept of chiplets is being used in limited designs."
Additional key findings of the report include:
Semico Research's new report, ASIC Design Starts by Major Market Applications, (SC106-23), offers a comprehensive analysis of the ASIC design start landscape today and into the future. It provides excellent data for product planning, marketing and sales activities at fabless semiconductor companies, 3rd Party IP vendors and major OEMs and IDMs. The report includes:
For pricing and additional information contact Rick Vogelei at (480) 435-8564 or email him.