Rich Wawrzyniak's blog

I had a very interesting discussion with Sundar Iyer, CEO of Memoir Systems, during a briefing they gave Semico on their just-released Pattern Aware Memory IP technology.

To briefly restate their announcement: Memoir has researched the different interactions between processors and memory in high-performance datacom systems and found that certain operations recur fairly often.  These operations roughly fall into four groupings: Counter Memory, Sequential Memory, Allocation Memory and Update Memory.  There are probably many more than these types, but Memoir is starting with these operations to begin with.

Memoir Systems is a 3^rd party memory IP company and, as such, devotes its time to developing and introducing embedded memory IP to the market. In the case of this new product announcement, the memory IP they are introducing is tailored around the four functions mentioned above. In other words, their memory IP is now configured to better support these specific operations at the memory level and not through software at the processor level in the system. This has large implications for system performance and throughput.

Electronic devices have evolved from cyclical killer applications to everyday ‘must-have’ tools.  Smartphones and tablets are a couple of these ‘must-have’ devices and are already making possible new world applications.  Many of these new world applications, including the Internet of Things and mobile health, will be pervasive and promise high semiconductor unit volumes.  Semico has identified 70 appliances in the average home that can become part of the Internet of Things.  Before we experience the hockey-stick growth in these markets there are a few hurdles to overcome: 

We have answered the first two questions on Market Growth and Market Maturation. The third question relates to Market Consolidation and its impact on the long term health of the 3^rd Party IP market.

Does the fact that we have recently seen several ‘large’ IP companies acquired by other ‘larger’ IP companies mean the long anticipated consolidation in the industry has gotten underway.

In order to answer this question it might be a good idea to consider what conditions contribute to, or force, a market consolidation in the first place:

Well, we have answered the first question about market growth, now how about market maturation?

Market maturation can be viewed in two ways:

Well, the title is a little facetious, but given all the recent acquisitions in the 3^rd Party IP market, it may certainly feel like that to some people. You can relax, there are still plenty of IP vendors left in the market and that won’t change anytime soon.

So what is going on?

• Does this foretell a slowing in the market growth so the smart people are getting out now?
• Is this the start of the long prophesied market maturation?
• Are we finally seeing the so-called market consolidation down to 4 IP vendors?

I can’t tell you how many times I have heard these questions over the last 10 years. It seems like anyone with an opinion on these issues usually speaks up when certain activities occur – like one IP vendor being acquired by another IP vendor. Or people see the acquisitions as a sign that the IP market can’t keep growing at the same rate as the last 3-4 years, which by the way was really quite good. In fact much better than the overall semiconductor market.

Let’s start by looking at the 3^rd Party IP market growth over the last several years.

3^rd Party IP Market Growth Rates: 

It’s that time of the year when everyone recaps what occurred during the current year and looks forward to possible developments and trends for the coming year. Dr. Wally Rhines, CEO of Mentor Graphics and industry luminary,  posted an article in EETimes on 11/28/12 looking at previous advances in the semiconductor industry and how, if these trends continue, they might impact our industry looking 40 years out in time. Dr. Rhines brought some amazing metrics to light:

Grant Pierce, Chief Executive Officer, Sonics, Inc., gave a keynote presentation at the Semico Impact Conference: Focus on the IP Ecosystem on May 16, 2012.  His presentation that looked at the rise of cloud computing and its impact on the SoC market. Today, consumers expect connectivity ‘Anytime, Anywhere’ and can mostly get what they want over the various networks in the market today. However, as more of that connectivity functionality that resides in the ‘cloud’, increases in device performance are necessary to keep pace with the rich features that reside in the cloud. This puts pressure on SoC design and SoC architectures. Cloud-scale devices are driving SoC complexity due to the following market demands.

John Koeter, the Vice President of Marketing, for the Solutions Group at Synopsys, Inc., gave a presentation at the Semico Impact Conference:  Focus on the IP Ecosystem on May 16, 2012 that looked at the changes occurring in the market today caused by the rise in mobile devices. First, he started of by giving some metrics on the mobile market captured by Cisco.

Semico held its Impact conference: Focus on the IP Ecosystem at the DoubleTree Hotel in San Jose, CA on May 16^th,2012.  The day before, on May 15^th, Cadence Design Systems announced its first IP Subsystem product, a Storage IP Subsystem based around the new NVMe (Non Volatile Memory express) interface standard for flash-based storage applications completed in March, 2011.  This IP Subsystem provides a complete HW / SW verified solution and maximizes the command throughput for interaction between system software and the storage system.

It is intended for those applications that want to replace rotating media in a system with flash-based Solid State Drives (SSD). Vishal Kapoor, Vice President, Marketing Design IP and Services at Cadence gave a presentation at the Semico conference the very next day. He provided some fascinating insights into the forces at work behind the creation of their Storage IP Subsystem.

Designers at large IDMs first created their own IP Subsystems out of the discrete IP blocks they were already licensing or had developed internally.  This was done to both reduce the level of effort they were expending to create a certain level of functionality and to increase the performance of these discrete blocks in the design. This process has been occurring for the last 4 – 5 years as a captive activity at several of the larger IDMs around the world.

Now, for the first time, major IP Vendors are starting to offer their own IP Subsystems as products available from the 3^rd Party market to designers at companies of all sizes. The IP Subsystem as a product is the embodiment of the desire by silicon designers to move up a layer of abstraction and to design with system-level functions instead of licensing many discrete IP blocks and aggregating them into the system-level functionality they need for their silicon solutions. By approaching the design flow in this manner, a great deal of time and cost can be removed from the design effort. There are several potential benefits to designers in adopting this approach: