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Microchip PIC32 Family Reaches New Levels of Performance and Integration

Microchip has announced an addition to its 32-bit MCU line of PIC32 called the PIC32MZ Embedded Connectivity (EC) family.  The PIC32 is based on the MIPS architecture.  The new PIC32MZ is Microchip’s first MCU to feature Imagination’s MIPS microAptiv™ core.

The microAptiv core adds 159 new DSP instructions that enable the execution of DSP algorithms at up to 75% fewer cycles than the PIC32MX families.  Microchip has tripled the performance over its previous generation reaching 330 DMIPS.  The microMIPS instruction set also enables improved code density for the PIC32MZ.

Microchip has integrated a large number of peripherals, mostly to support high speed connectivity: Hi-Speed USB, 10/100 Ethernet MAC, 2 CAN 2.0b modules, 6 UART, 6 SPI / I²S, 5 I²C™ and SQI (Serial Quad Interface).  The SQI supports high-speed interface to external Flash.  Integrated onto the PIC32MZ is up to 2MB of Live-Update Flash.  This is the Flash technology Microchip acquired with SST.

The PIC32MZ targets a broad range of applications which include automation (factory, building and home), consumer audio, automotive, security, power meters and cloud computing. 

Mobile Health Feeds Big Data

Healthcare has been changing in big ways.  These days, a good system can monitor a patient and then use that data to enact behavioral change for an entire society.  Changing society for the better is basically the end goal of Big Data.  

Big Data in healthcare means mining personal data that can be applied either to personal care or combined with large demographic segments to spot trends and improve care to either cure or manage disease and sickness or to change behavior in a positive way.  

For example, technology like Dexcom’s glucose monitor, watches blood sugar levels every five minutes for five days, and is approved by the FDA.  Since controlling sugar is so important, someone who is diabetic can now send complete data to their doctor.  This is something patients have never before been able to do.  This constant stream of data is “Big Data” in that, even if there isn’t a cure, disease and sickness can still be managed by understanding our smallest reactions to daily stimulus.  

This becomes predictive modeling, which means decreased health costs, and implies an upcoming data deluge.  It is possible to get a trillion GB of data for each individual.  The amount can be astronomical, and apps will need to sift through the data to get to the relevant and actionable data (Market Opportunity for new Tech).

A New Class of Data Center SoCs: John Koeter of Synopsys

John Koeter of Synopsys spoke at the Semico Impact Conference: Focus on the IP Ecosystem (November 6, 2013) about a new class of data center SoCs. Koeter is vice president of the Marketing Solutions Group at Synopsys. In this capacity he is responsible for the marketing of Synopsys' DesignWare® Intellectual Property (IP), Professional Services and System-Level Design products.

Koeter noted the trend of increasing internet traffic which is being driven by the mobile market. Globally, peak Internet traffic is expected to grow 3.5x from 2012 to 2017, a 29% CAGR. This will impact the IP world, as semiconductors are expected to meet the changing needs of the data centers. He foresees a major sea change in the data center. The trends are for software defined networks (SDN) and low power micro servers. Also, there will be improvements in the cost/performance ratio achieved through application acceleration with PCIe SSDs.

According to Koeter SDN will reach 35% penetration of the Ethernet switching by 2016. Data centers are moving away from proprietary solutions that are vendor specific. For semiconductor companies this represents $3.7 billion market for SDN and network infrastructure. New architectures are emerging to meet the needs of the data centers. The new semiconductor devices will be SDN-enabled switch ASSPs and SDN-enabled communication processors. Highly integrated processors for new micro servers which are focused on reducing power are necessary.

What I Learned on the Way to the Semico Impact Conference: Focus on the IP Ecosystem

I had a very interesting discussion with Sundar Iyer, CEO of Memoir Systems, during a briefing they gave Semico on their just-released Pattern Aware Memory IP technology.

To briefly restate their announcement: Memoir has researched the different interactions between processors and memory in high-performance datacom systems and found that certain operations recur fairly often.  These operations roughly fall into four groupings: Counter Memory, Sequential Memory, Allocation Memory and Update Memory.  There are probably many more than these types, but Memoir is starting with these operations to begin with.

Memoir Systems is a 3rd party memory IP company and, as such, devotes its time to developing and introducing embedded memory IP to the market. In the case of this new product announcement, the memory IP they are introducing is tailored around the four functions mentioned above. In other words, their memory IP is now configured to better support these specific operations at the memory level and not through software at the processor level in the system. This has large implications for system performance and throughput.

IP Ecosystem Solutions for Complex Systems

At the Semico Impact Conference: Focus on the IP Ecosystem, Mahesh Tirupattur, Executive Vice President, Analog Bits, challenged four panelists to an engaging discussion on their approach to IP Ecosystem Solutions for Complex Systems. Panel participants included Dan Kochpatcharin, Deputy Director, IP Portfolio Management, TSMC; Jason Polychronopoulos, Mentor Graphics; Chris Rowen, Cadence Fellow; and Warren Savage, President and CEO, IPextreme.

Tirupattur skillfully pulled both humorous and discriminating observations from the foundry perspective, the EDA perspective and both a large and small IP vendor.
The topic of the panel was the high cost and risk of integrating IP in today’s semiconductor product development. There’s a massive risk of product failure from choosing the wrong IP, the wrong supplier, the wrong fab, or the wrong process. A misstep means jobs could be on the line. Today, complex SoCs are not comprised of just one or two IP blocks, it’s a battalion of IP coming from a variety of sources. Dan Kochpatcharin of TSMC noted that at the 20nm node an average design has 12 unique IP blocks. That compares to an average of only eight at the 28nm node.

IP Subsystems: Is It A Catalyst for Leading Edge Design Enablement

The System-on-Chip (SoC) market has been successful because of the increasing use of 3rd Party Semiconductor Intellectual Property (SIP). SoC designers now look to move up a layer of abstraction to design with system level functionality in order to reduce the effort and cost associated with complex SoC designs. By doing so, SoC designers can add higher levels of system functionality and cutting-edge feature sets without needing to design these functions at the absolute lowest level of complexity.

The IP subsystem is a methodology designers are employing to infuse the right level of complexity and functionality to meet rapidly changing market requirements without experiencing a corresponding increase in design costs or design cycle time.
The market entry by Cadence, Synopsys, Sonics and Analog Bits over the past 12+ months marked a turning point in the IP subsystem era. Semico expects to see a competitive market for 3rd party IP subsystems in the follow areas:
• Computing subsystems
• Memory subsystems
• Video subsystems
• Communication subsystems
• Multi Media subsystems
• Storage subsystems
• Audio subsystems
• Security subsystems
• System Resource Management subsystems

New World Applications and the Role of IP

Electronic devices have evolved from cyclical killer applications to everyday ‘must-have’ tools.  Smartphones and tablets are a couple of these ‘must-have’ devices and are already making possible new world applications.  Many of these new world applications, including the Internet of Things and mobile health, will be pervasive and promise high semiconductor unit volumes.  Semico has identified 70 appliances in the average home that can become part of the Internet of Things.  Before we experience the hockey-stick growth in these markets there are a few hurdles to overcome: 

Apple iPhone 5S Compass Problems?

Last week there were reports in the media that users were complaining of off-the-mark readings from the Apple iPhone 5S compass.  Compared to the previous iPhone 5, Apple’s native compass app is displaying discrepancies an average of 8 to 10 degrees with both devices running iOS7.

This has caused “wonky” game experiences such as in driving and physics-based games that rely on tilting the screen for in-game motion.

This has brought into question whether or not this is a hardware malfunction with the motion sensors or some other chip.  There are several teardowns available online.  An examination of the bill of materials shows that the iPhone 5S has:

  • Gyro: STmicro
  • eCompass (magnetometer): AKM
  • Accelerometer: Bosch Sensortec
  • NXP LPC18

The NXP LPC18 is an ARM Cortex-M3 MCU.  It is a coprocessor for the Apple A7 Apps Processor.  This MCU is the sensor hub controller of the iPhone 5S.  It has been referenced as the M7.

The first things that came to my mind as to the cause of the problem: 

Sensor Fusion in the Spotlight

Sensor Fusion is both a hardware and software solution and begins with the combination of more than one sensor.  But there is much more to this solution than integrating sensors.  The objective is to combine the data collected by the sensors in order to extract and use the information.  This requires an algorithm which works with the operating system and makes data available to high level applications such as personal navigation, activity monitoring, context awareness and augmented reality.  This algorithm is often embedded in a microcontroller known as a sensor hub which connects to an applications processor.

On September 23, 2013 ST and Movea announced their agreement to integrate Movea’s SmartMotion technology into the STM32F401 microcontroller operating as a low-power sensor-hub controller.

ST is the leading supplier of MEMS sensors for the consumer and communications market, in particular smart phones.  The company also offers it line of ST32 ARM based MCUs as sensor hub controllers. 

Movea is a leading provider of Sensor Fusion algorithms offering data fusion and motion processing firmware, software, and IP for the consumer electronics industry.  The company offers a comprehensive set of SW, firmware and tools to enable an advanced-motion user experience. 

Movea’s firmware will be integrated into the STM32F401 sensor management platform.  The STM32F401 with SmartMotion technology and tools will be available in Q4 2013. 

SOC Issues and IP Implications

The gap between time-to-market and design completion continues to lengthen as chip complexity increases.

Unfortunately, just as design cycle times have lengthened, product life cycles have shortened, a difficult dichotomy to manage. Increasing capability in terms of gate counts and the impact this has on enhancing functionality and feature sets in the end system, is adding to, not shortening, design cycle times. SoC designs are comprised of complex silicon subsystems, aimed at a system-level solution.

One or many high-performance synthesizable CPU cores, DSP cores, GPU cores, a large block of memory, one or more ‘real-world’ interfaces, mixed-signal or analog blocks, high performance on-chip bus structures and embedded API’s or other software are all elements of SoC design today.

The ability to re-use existing Semiconductor Intellectual Property (SIP) blocks over the course of many SoC designs is one way to reduce the design time. Unfortunately, there are many issues to be addressed. One such issue is interoperability between SIP. Another feature of the SoC market is the willingness of established silicon manufacturers to solicit and acquire SIP from 3rd party sources for incorporation into a currently running design or into their SIP libraries.

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