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July 2015

Licensing, Royalty and Service Revenues for 3rd Party SIP: A Market Analysis and Forecast for 2015

The 3rd Party Semiconductor Intellectual Property (SIP) market has seen great innovation in the products it offers to System-on-a-Chip (SoC) designers over the last ten years. If any market segment in the semiconductor industry typifies the intense evolutionary pressures that the entire electronics market has undergone, it is the 3rd Party SIP market. A new report from Semico Research, "Licensing, Royalty and Service Revenues for 3rd Party SIP: Market Analysis and Forecast for 2015," forecasts the worldwide IP Market to approach 8 billion by 2019.

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Semiconductor IP Market to Approach $8 Billion by 2019, says Semico Research

The 3rd Party Semiconductor Intellectual Property (SIP) market has seen great innovation in the products it offers to System-on-a-Chip (SoC) designers over the last ten years. If any market segment in the semiconductor industry typifies the intense evolutionary pressures that the entire electronics market has undergone, it is the 3rd Party SIP market.

Semico Research Announces Impact 2015 Panel: How Do We Get to Next-Generation High Speed Data Transfer Rates?

The need for more bandwidth is continuing to drive the Internet infrastructure. Rapid growth of server, network and internet traffic is fueling the need for higher data rates. Key contributors to data demand include Internet consumer applications, cloud-based computing and storage, virtual servers, advances in scientific and financial computing and the Internet of Things. While fiber optic cables are capable of delivering data rates into terabits/sec, the main bottleneck continues to be the last critical mile solution.

Semico Research Releases Latest Fab Database Report: Highlights Where Billions of Dollars in Capex are Being Spent

One of the largest events in the semiconductor industry, SEMICON West just wrapped up another successful show.  Semico Research was there and observed that the used equipment portion was particularly well-attended.  With the emergence of the IoT, MEMS and sensor production are in higher demand than ever before.  These devices are produced in 200mm fabs that are fully depreciated and very efficient.  Many analog products are also made on 200mm equipment, although some production is turning to 300mm.  The increase in demand for 200mm production has increased the need for used equipment.

Unexpected Surprises at SEMICON West 2015

As companies such as TSMC and Intel spend less on capital expenditures this year, expectations for SEMICON West 2015 were pretty bleak. I thought I’d have fewer appointments and nothing to really write home about.

Au contraire. Although traffic on the show floor was nothing compared to events like CES, there are three things that I think are driving growth and excitement at semiconductor equipment and material companies.

First, the major driver of equipment spending is changing from a focus on new greenfield fabs to the technology transitions that are and are not happening. Gary Dickerson, CEO of Applied Materials, clearly laid out the ‘inflections’. 3D NAND devices are a material enabling inflection and 10nm/7nm logic devices are driving a litho or patterning inflection. What does all this mean? The bottom line is more steps and more tools.

Semico Fab Database and Update Summary First Half 2015

Semico tracks over 890 semiconductor fabs in its Fab Database.  The database includes detailed information about the fabs, including the operating status of the fab, its location, process and products, wafer size and capacity, and more.  The other document included with the database is a Word file containing a summary of updates made to fabs by company type:  Memory, Foundries, and Other.  

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Capex Restraint Not Always a Bad Thing

A recent article by Peter Clarke, EETimes, ‘TSMC Overtakes Intel in Chip Capex Ranking’ seemed to imply that a lower capital expenditure in 2015 was a bad sign. A growing capital expenditure budget does not always signal good times ahead just as a small capex does not mean disaster. Most companies are talking about the slowing or end of Moore’s law. Intel is one of the few companies that is back on Moore’s Law transistor density curve with their 14nm second generation Tri-Gate process. In fact, Intel has publicly stated that at 14nm they are ahead of Moore’s Law! Increased transistor density typically means smaller die sizes. All other variables being equal, this also translates to higher yields and less wafers required to meet market demand. A reduced capex is one of the benefits of improved efficiencies when a process obtains its sweet spot. Is it possible that others have to spend more in capex in anticipation of larger die sizes, lower yields and the need for more wafer throughput? A growing capex could mean expanding sales or the promise of a new market, but declining capex is not necessarily a bad omen. Remember when the industry experienced huge crashes because of the cycles that were caused by capex overspending? We haven’t experienced one of those in a few years, but I’m sure that can’t be erased from our memories yet.

Registration Opens for Inaugural Boards, Chips and Packaging IMPACT Conference Hosted by Isola and Semico Research

Captain Chesley B. (Sully) Sullenberger, III to deliver a keynote during the one-day event focused on system-level integration across the entire hardware development process.
 

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Boards, Chips and Packaging:
Designing to Maximize Results

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