IMPACT Conference Panel to Address Meeting Market Requirements for the IoT

Semico IMPACT Conference Afternoon Panel -- Boards, Chips & Packaging:  Meeting Market Requirements 

The Internet of Things promises an unprecedented opportunity for the electronics industry.  From front-end devices like roadway sensors to back-end network equipment supporting the rush of new data inputs, electronics are the integral foundation of this new era.  More than ever, pressure is on the electronics industry to deliver the right solution at the right time and at the right price. A panel will discuss this important issue during the Semico IMPACT Conference: Designing to Maximize Results, October 13, Computer History Museum (1401 N Shoreline Blvd., Mountain View, California 94043).
Designers across the electronics ecosystem will gather to discuss and address issues like:

• Parasitic capacitance and inductance issues that impact signal integrity;
• Board material characteristics to deal with varying frequencies, especially high frequency;
• New package form factors such as thinner packages and 2.5D and 3D packages;
• Packages with tight interconnect spacing creating board design issues;
• Board layout techniques to avoid cross talk, EMI, and short circuits;
• Shorter design cycles with added cost pressure; and
• Designing boards for maximum power reduction and heat dissipation.

This panel will wrap up the event with insights and solutions that will help you implement successful product launches and grow your markets.  Expertise will be provided by the following industry authorities.
 
Panel:  Boards, Chips & Packaging:  Meeting Market Requirements
Moderator:  Mike Noonen, Silicon Catalyst
Tarun Amla, Isola
Heidi Barnes, Keysight Technologies
Nathapong Suthiwongsunthorn, Ph.D., UTAC
Tom Whipple, Cadence
 
Register today to reserve your seat at Boards, Chips and Packaging:  Designing to Maximize Results.  This Semico IMPACT Conference will provide a lineup of thought-provoking keynotes and enlightening panels.  If you are a board designer, system architect, an SoC designer or an ASIC design manager, plan to attend this event on Tuesday, October 13, 2015 at the Computer History Museum (1401 N Shoreline Blvd., Mountain View, California 94043).
 
What:  Semico IMPACT 2015
When:  October 13, 2015
Where:  Computer History Museum, 1401 N Shoreline Blvd., Mountain View, California 94043
Visit our website for more information and to register.
 

For more information, contact Rick Vogelei.

Phone: (480) 435 - 8564

Email: rickv@semico.com

About Semico

Semico is a semiconductor marketing & consulting research company located in Phoenix, Arizona.

Semico was founded in 1994 by a group of semiconductor industry experts. We have improved the validity of semiconductor product forecasts via technology roadmaps in end-use markets.

Semico offers custom consulting, portfolio packages, individual market research studies and premier industry conferences.