Phoenix, Arizona May 11, 2012 - Now that the semiconductor industry in on an upswing, companies are scrambling to find ways to take advantage of this market window in order to gain design wins. There's a multitude of third party IP solutions promising quicker time to market, easy integration, lower cost, and reduced effort. Can you believe what they're saying? Is it right for you?
Semico is hosting a conference on the IP Ecosystem and is bringing together some of the most influential companies in the IP, SoC, EDA, Semiconductor and Silicon Foundry markets to discuss these questions and more:
• How can we reduce design costs, especially for software, in a meaningful way?
• How can SoC designers continue to meet these rising demands without 'breaking the bank' through higher design costs, or missing the market window altogether because of long design cycle times?
• What methods are available to reduce power consumption and still meet consumer expectations and market requirements?
• How can IP integration costs for complex SoC designs be curtailed or even lowered while still infusing added functionality into these designs?
• Are there any solutions today that reduce the level of effort needed to reach timing closure and that make the verification process easier?
• How can SoC designers reduce the level of effort needed to create the system level functionality needed for their silicon solutions and still reach performance and functionality targets set by the market?
• Is there any solution on the horizon that can finally reduce memory latency and break the 'memory bottleneck'?
• How can SoC designers test out different types of IP cost effectively and efficiently?
• What new markets and applications will drive wafer starts at 20nm? At 14nm?
EDA tool vendors, Silicon Foundries, FPGA vendors, IP Vendors and IDMs and OEMs alike will present their ideas about the path the industry is taking and should take to resolve these questions. Semico's day-long conference will cover what problems face the industry today and their potential solutions, benefitting SoC designers and silicon architects alike.
This conference provides an opportunity to hear real solutions from ARM, Synopsys Tabula, Sonics and Cadence Attend and ask some questions! That would be worth the price of admission alone.
We hope to see you at the Semico IMPACT Conference: Focus on the IP Ecosystem on the 16th! The event will be held at the DoubleTree Hotel in San Jose. Register today and save 50% off the price at the door! Online registration closes May 14th.
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