Semico's Rich Wawrzyniak will participate on a panel at Mentor Graphic's DAC booth, Wednesday June 10, 2015, at 4pm. The title of the panel is "The IC Design Waterfall: How Advanced Design Techniques Are Now a Requirement at Established Nodes".
Panel Abstract: Traditionally, the most difficult and advanced IC design verification techniques were required only at the newest process node. Signoff at established nodes was “a piece of cake” compared to newer nodes. This is changing as the complexity of new designs targeted for established process is exploding and as such, drives the need to adopt advanced verification methods. Complicated schemes to manage power consumption, use of 3rd party IP, and multiple CPU, GPU and DSP cores are now being included in IoT designs. Coupled with more comprehensive reliability requirements when targeting safety critical applications are all making signoff more difficult at every node. A panel of experts will discuss how this phenomenon is impacting the delivery of new designs to the marketplace, and also take questions from the DAC audience.
More information and to register: http://www.mentor.com/events/design-automation-conference/booth