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More News from Intel Developer’s Forum

In addition to the news on WiMAX, UMPC and MID discussed in the previous article, there are more developments from IDF. Here is a brief review.

The next step in Intel’s MPU roadmap, Penryn, was revealed. This is a product family which will have several variants. Penryn is more than a die shrink of the current Core 2 Duo. There are some added features and a larger L2 cache, up to 6 Mbytes. Penryn is manufactured on 45nm. Intel is currently in full production at two fabs (Oregon and Arizona) with product shipping to customers by November 12.

Penryn is a native dual core MPU. Intel will also launch a quad core Penryn. However, this will be a pair of dual core MPUs in one package. This is nothing new for Intel. In fact, the current Xeon Core2 Quad is a pair of Xeon Core2 dual core (65nm) in one package. It appears that a pair of dual core Penryn will consume less die area than AMD’s Barcelona. The two die (quad core) Penryn is code named Yorkfield. The single die (dual core) is code named Wolfdale. In 2008 a notebook version of Penryn will be launched

The first native quad core MPU from Intel will be Nehalem. This will be a new microarchitecure scalable from one to sixteen cores. Nehalem is expected to be launched by mid-2008 using the 45nm process.

At the center of Intel’s design and manufacturing is what the company refers to as its “Tick-Tock” model. This implies the “clock-work” mechanism between design and manufacturing process. In short, Intel will move to a new manufacturing process with a well understood MPU. The MPU might be a die shrink with some new features. Intel will manufacture a new MPU design on a well understood manufacturing process.

A couple of years ago Intel fell out of synch with this model. This opened up a window of opportunity AMD took advantage of. Intel appears to have its clock back in synch. The following is Intel’s basic “Tick-Tock” model roadmap.

Intel expects to see a fast ramp for its 45nm manufacturing. The company will likely see 65nm to 45nm cross over by mid-2008.

The company also demonstrated a 32nm SRAM test chip. This is the process scheduled for 2009 MPU production.

Semico Spin

Over the next 12 months there will be a huge influx of new MPUs from Intel. AMD will counter with its own innovations in order to regain the ground it has lost to Intel. Semico expects to see competitive pricing in 3Q 2007 as each vendor rolls out their new products. This will continue to drive the ASPs lower. Semico expects overall MPU pricing to stabilize by 4Q 2007 as PC demand increases.

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