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Semico is a semiconductor marketing & consulting research company located in Phoenix, Arizona. We offer custom consulting, portfolio packages, individual market research studies and premier industry conferences.

Semico Impact 2015


Boards, Chips and Packaging:

Designing to Maximize Results

Computer History Museum, Mountain View, CA
October 13, 2015
Pre-registration $75.00 -- Walk-up Registration $150.00

Today, chip designers craft their semiconductor products to meet ever-increasing market demands for lower power, higher performance and lower costs.  While chips may meet system specifications, these complex designs require even more attention at the packaging and board level to obtain the full benefit of the chip design.  Performance, power dissipation and formfactor challenges require a rechanneling of system design effort away from merely implementing ever more-complex silicon solutions towards dealing with complex applications from a system integration point of view.  The rollout of 3D, 2.5D and silicon interposers add yet another dimension.

The new model must incorporate tasks that had previously been accomplished in silos and once held as separate functions.  The creation of the system solution now requires planning chip design with packaging and PCB layout to create the optimal end application. 

On October 13th, 2015, Semico will be gathering the industry’s experts on this topic to open a forum for discussion, insight, and collaboration to enhance system-level design, performance and cost savings with first time right solutions.   Boards, Chips and Packaging: Designing to Maximize Results is a must-attend event for board designers, system architects, chip designers, package designers, program managers, and marketing executives involved in the system-level ecosystem decisions.  You will leave this event with a better understanding of what you can do to get your company the design wins that provide the highest performance and lowest power at the least possible cost while minimizing respins.

The Semico IMPACT Conference “Designing to Maximize Results” will provide a lineup of thought-provoking keynotes and enlightening panels.  If you are a board designer, system architect, an SoC designer or an ASIC design manager, plan to attend this event on Tuesday, October 13, 2015 at the Computer History Museum in Mountain View, California.

For more information contact:

Jim Feldhan
602-997-0337 Opt#1
jimf@semico.com

Joanne Itow
602 997-0337 Opt #2
joannei@semico.com

Kella Knack
707-328-6865
kjspeedingedge@cs.com

 

Price: $75.00
Date: 
Tuesday, October 13, 2015 - 08:00

Semico Research Releases Latest Fab Database Report: Highlights Where Billions of Dollars in Capex are Being Spent

One of the largest events in the semiconductor industry, SEMICON West just wrapped up another successful show.  Semico Research was there and observed that the used equipment portion was particularly well-attended.  With the emergence of the IoT, MEMS and sensor production are in higher demand than ever before.  These devices are produced in 200mm fabs that are fully depreciated and very efficient.  Many analog products are also made on 200mm equipment, although some production is turning to 300mm.  The increase in demand for 200mm production has increased the need for used equipment.

Unexpected Surprises at SEMICON West 2015

As companies such as TSMC and Intel spend less on capital expenditures this year, expectations for SEMICON West 2015 were pretty bleak. I thought I’d have fewer appointments and nothing to really write home about.

Au contraire. Although traffic on the show floor was nothing compared to events like CES, there are three things that I think are driving growth and excitement at semiconductor equipment and material companies.

First, the major driver of equipment spending is changing from a focus on new greenfield fabs to the technology transitions that are and are not happening. Gary Dickerson, CEO of Applied Materials, clearly laid out the ‘inflections’. 3D NAND devices are a material enabling inflection and 10nm/7nm logic devices are driving a litho or patterning inflection. What does all this mean? The bottom line is more steps and more tools.

Semico Fab Database and Update Summary First Half 2015

Semico tracks over 890 semiconductor fabs in its Fab Database.  The database includes detailed information about the fabs, including the operating status of the fab, its location, process and products, wafer size and capacity, and more.  The other document included with the database is a Word file containing a summary of updates made to fabs by company type:  Memory, Foundries, and Other.  

Table of Contents: 

Capex Restraint Not Always a Bad Thing

A recent article by Peter Clarke, EETimes, ‘TSMC Overtakes Intel in Chip Capex Ranking’ seemed to imply that a lower capital expenditure in 2015 was a bad sign. A growing capital expenditure budget does not always signal good times ahead just as a small capex does not mean disaster. Most companies are talking about the slowing or end of Moore’s law. Intel is one of the few companies that is back on Moore’s Law transistor density curve with their 14nm second generation Tri-Gate process. In fact, Intel has publicly stated that at 14nm they are ahead of Moore’s Law! Increased transistor density typically means smaller die sizes. All other variables being equal, this also translates to higher yields and less wafers required to meet market demand. A reduced capex is one of the benefits of improved efficiencies when a process obtains its sweet spot. Is it possible that others have to spend more in capex in anticipation of larger die sizes, lower yields and the need for more wafer throughput? A growing capex could mean expanding sales or the promise of a new market, but declining capex is not necessarily a bad omen. Remember when the industry experienced huge crashes because of the cycles that were caused by capex overspending? We haven’t experienced one of those in a few years, but I’m sure that can’t be erased from our memories yet.

Registration Opens for Inaugural Boards, Chips and Packaging IMPACT Conference Hosted by Isola and Semico Research

Captain Chesley B. (Sully) Sullenberger, III to deliver a keynote during the one-day event focused on system-level integration across the entire hardware development process.
 

Challenges in MEMS and Sensor Manufacturing Point to Need for Collaboration

The MEMS, sensor and semiconductor industries have long been connected by a shared  infrastructure and supply chain, but there are significant differences in the manufacturing of MEMS and  sensors, including the use of unconventional materials, wafer bonding, packaging, lack of standard processes, to name a few.

Sensor Hub Shipments to Reach 6.9 Billion Units by 2020, says Semico Research

The market for sensor fusion has been growing rapidly and has seen major changes and shifts in the ecosystem. The market opportunities have attracted more chip vendors. In the span of one year, the number of companies offering a sensor hub controller has grown from 16 to 33 companies. The sensor hub vendors are not only targeting smartphones and tablets, but are also focusing on wearables and the broad range of Internet of Things (IoT) applications.

Capex Growing to a Record High in 2015

Semiconductor companies are spending more than ever to stay competitive.  In 2015, the total amount spent is forecast to be $68.7 billion, up 9% from 2014’s $63.3 billion.  This breaks the previous record set in 2011 at $63.8 billion, as shown in the following graph. 

Total Semiconductor Capital Expenditures, 2009-2015

2015-06 capex blog - total capex.png

Source:  Semico Research Corp.

The Top 15

Accounting for almost 90% of the total spending are fifteen companies.  The top fifteen companies stayed the same from 2014 to 2015, but their order did change somewhat.  The top five spenders are no surprise, with Samsung in the top spot, followed by TSMC.  What is unusual is Intel slipping into the third position.  To round out the top five, GLOBALFOUNDRIES and Hynix switched places as the foundry expects to increase spending 22% this year versus Hynix’s 5% increase.  In the top fifteen, the company with the largest increase is Sony, with a 207% increase to almost US$2 billion.  The bulk of this increase is to expand image sensor production capacity, but some will also be spent on camera module production capacity, a relatively new market for Sony.  Sony’s dollar increase is second only to Samsung’s, but this is partly due to the decline in value of the yen.

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