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Principal Analyst Rich Wawrzyniak participated in a webinar hosted by Achronix, titled The Rise of the Chiplet.  The webinar took place on February 9, 2023 and was moderated by SemiEngineering’s Brian Bailey.  The panel members were Achronix’s Nick Ilyadis, Semico’s Rich Wawrzyniak, and ODSA’s Bapi Vinnakota.  They discussed the current landscape for chiplet technology, predictions for the coming years, what’s needed for chiplet adoption, and the status and evolution of die-to-die interface standards, as well as answered live questions.

Last week I took a ride in a friend’s new Nissan Leaf, which may be the perfect urban car. It has adequate performance and can more than keep up with traffic, even on the Interstate. It is essentially noiseless. Its range is limited, but more than adequate for trips around a city. It has a quite spacious storage capacity. Best of all, it’s pollution free. The only thing that’s missing is the “zoom.”

What is zoom? It’s a sleek, sexy body style - maybe a coupé or convertible. It’s the sound of an engine howling toward a 7,000 rpm redline. It’s carving a corner and hitting the apex exactly. It’s braking as late as possible while double-clutching to downshift, turning-in at the right point and then maxing the exit speed. It’s 0 to 60 in less than 5 seconds. It’s the thrill of pretending you’re a racer. It’s the ego trip of posing as a rugged outdoor 4WD dude. It’s the promise of getting the girl. Until now, zoom is what has sold cars, but we don’t need zoom any more.

My friend doesn’t care about zoom. He doesn’t do drag racing starts or road racing corners. He doesn’t go off-road. He’s married. He already got the girl a long time ago. What he wants is reliable, comfortable, economical transportation. Because he cares about ecological issues, a green car with low carbon emissions is a bonus. He’s a good representation of an average car buyer, but he’s ahead of the pack.

In the last few days, many articles have been written about Steve Job’s contributions.  They tend to focus on recent product introductions, the iPod, iTunes, the iPhone and the iPad.  Those are sensational products; but, in my opinion the authors’ memories are too short.  The articles do not give proper recognition to Steve Job’s first big hit, the Apple II.

In 1978 I was working for EMM Semi, a pioneering 4K SRAM manufacturer.  Yes, 4K!  In June of that year I went to the National Computer Conference in Anaheim, Ca.  It was a big iron show.  The main hall featured exhibits by IBM and the Seven Dwarfs, (Burroughs, Control Data, General Electric, Honeywell, NCR, RCA and Sperry Rand) as well as minicomputer manufacturers such as Digital Equipment Corp. and Data General.  Microcomputers were only allowed, very grudgingly, in a much smaller, dingier hall across the street.  None of the big iron people thought microcomputers were a real market.

I remember counting something like one-hundred-forty small microcomputer manufacturers at that show.  Because almost every microcomputer manufacturer had a proprietary operating system, there were nearly as many operating systems.  The Wintel partnership was far in the future.

I attended the 48^th Design Automation Conference in San Diego this past week and I came away from the conference with several main thoughts:

• EDA tool vendors continue to enhance their products by listening to their customers and acting on those inputs.
• There is mounting evidence that the discussion centered around the trend towards IP Subsystems is real and has substance behind it.
• The Automotive Networking workshop on Sunday featured a lively discussion around what networking bus would come after Ethernet.
• There seems to be growing dissatisfaction around the limited amount of data showing silicon and software design costs for SoCs.

At this DAC conference several IP vendors and EDA tool vendors were discussing the term ‘IP Subsystem’ in their booths and in presentations and panel discussions given throughout the time I was there.

Some of the notable vendors discussing the concept were: Sonics, Synopsys, Cadence, Atrenta, ChipStart, and eSilicon to name a few.

On May 10, 2011 ADI announced the availability of the semiconductor industry’s only double balanced wideband passive mixers.  P/N ADL5811 is a single-channel mixer and P/N ADL 5812 is a dual-channel mixer. Due to differences in frequency allocations around the world, wireless receiver manufacturers often need to provide a receiver that will operate on several different frequencies, scattered across a wide frequency band.   But, this presents a quandary.  Active mixers have the requisite bandwidth but also have higher noise figures and lower linearity than passive mixers.  Passive mixers have better noise figures and linearity but only across a narrow bandwidth.  The new Analog Devices’ mixers employ a clever technical ploy to achieve the best of both worlds. The Analog Devices’ mixers use a programmable RF balun transformer and a programmable low pass filter to allow a receiver manufacturer to tune the mixer to a frequency of their choice.  This allows a passive mixer to retain its low noise and greater linearity characteristics while achieving the bandwidth of an active mixer.  This allows a receiver manufacturer to shorten design time, eliminate off-chip matching components, achieve a shorter time to market, reduce the number of component qualifications and greatly improve inventory management.

In a May 2, 2011 presentation at the Semico Summit, Mr. Danny Biran, Senior VP of Marketing at Altera, discussed new opportunities as the boundaries between semiconductor logic device types become blurred. According to Mr. Biran, the boundary between FPGAs, ASICS, ASSPS and CPUs (MPUs, MCUs and DSPs has until recently been extremely well defined. 

FPGAs were customer programmable standard products.  Programming was developed for and owned by the customer.  ASICs used a standard cell design methodology.  The design was owned by the customer.  ASSPs were a standard high-volume product developed by the semiconductor vendor for sale to multiple customers.  MPUs, MCUs and DSPs were standard products, but the software needed to implement an application was developed by the customer.  Now, the boundaries between those categories are becoming blurred. Various semiconductor vendors are offering FPGAs with an on-board MPU, ASICs that include an FPGA block or ASSPs with multiple processing cores.  

In an a May 2, 2011 presentation at the Semico Summit, Mr. Len Perham CEO, MoSys, Inc. discussed looming problems in the processing of Internet traffic and offered a solution. According to Mr. Perham, Internet traffic will increase exponentially over the next three years, driven by applications such as video streaming, IPTV, P2P, cloud computing, social networking and VoIP + video.  Today’s traffic routing methods will not be able to keep up with that growth, and memory is the bottleneck. 

The problem is that today’s 40Gbps and 100Gbps packet processor line cards address memory on parallel connections, which will not be adequate at faster speeds beyond 100Gbps.  Routing data at those speeds will require a serial connection to the memory, not a parallel connection. MoSys has developed the GigaChip™ Interface, which is now an open standard supported by the GigaChip Alliance. 

The GigaChip Interface is a short-reach, low-power serial interface, which enables highly efficient, high-bandwidth, low-latency performance.   It provides a fundamental performance breakthrough similar to the breakthrough achieved by DDR (Double Data Rate) DRAM.   The GigaChip Interface, using differential SerDes technology, is the next breakthrough in network processor to memory connections.  It allows a multiple-processor network processor to address multi-bank, multi-partitioned memory, so that each processor has access to memory without waiting.

As cell phones improve, offering more features and higher data transmission rates, base station manufacturers must provide more with less.  More bandwidth, more channels, more quality of service with less power, less space and less cost.  On March 21, 2011 Texas Instruments Incorporated announced the availability of three new 16-bit DACs that will help base station manufacturers accomplish exactly that.

Part number DAC3484 is a quad DAC with an interleaved 16-bit input bus.  It has a sample rate of 1.25 GSPS and 2X -16X interpolation, which allows a 312.5MSPS input each of its on four paths.   Part number DAC3482 is a dual DAC, also with 2X - 16X interpolation, which allows an input rate of 625MSPS on each of its two channels.  Finally, part number DAC34H84 is a quad DAC with a wider 32-bit input bus, which allows a sampling rate of 625MSPS on each of its four paths.

Let’s focus on the DAC3484.  Its sampling rate is 25% faster than its nearest competitor.  It needs only 250mw of power, 65% less than its competition.  It fits in a 9mm X 9mm multi-row QFN package, 40% smaller than its nearest competitor.  It has an internal low-jitter 2x to 32x phase locked loop timer, which eliminates the need for an external, low-jitter clock multiplier to match the interpolated rate.  This is doing more with less.

Let’s pretend for a moment that you’re a design engineer at a company making an industrial control device or a medical instrument.  You’ve got the digital portion of your design pretty well nailed, but there is a 4mA to 20mA process control loop and some isolation issues that you’re a little concerned about.  Although you could design some analog circuits to solve these problems, you’re really a digit-head.  It would take a lot of your time, and you’re not sure you would get it right the first time.  What to do? Analog Devices, Inc. (ADI) has solved your problem.  ADI has recently introduced an expanded version of the company’s Circuits from the Lab^TM reference circuits.  These are not reference designs.  They don’t tell an engineer how to design an entire system.  Rather, they provide lab-tested circuit designs for some common analog circuits that give design engineers problems.  Some examples are ADC drivers, DAC outputs, RF or IF circuits or isolation circuits.  A complete list is available on the ADI website. In addition to the circuit design, ADI also provides circuit documentation test data and is now offering PCB layout files, software device drivers and, in some cases, evaluation hardware.  The purpose is to provide a deeper understanding of the circuit so that an engineer can easily trouble-shoot any glitches that might crop up.

The much anticipated announcement of the Apple iPad2 took place today.  Steve Jobs actually keynoted the announcement and received a standing ovation, despite his ongoing health issues.  Many of the announced features were expected improvements over the iPad; the basics include: