Silicon and Software Design Cost Analysis: The Impact of AI in EDA Tools

The semiconductor industry today is faced with several substantial issues—not the least of which are the continuing rise in design costs for complex SoCs, the decrease in the incidence of first-time-right designs and the increase in the design cycle time against shrinking market windows. Analysis of design activity for the three types of SoC shows that while design costs at new nodes continue to increase, the average design cost at each node is not increasing as quickly, giving room for designers to still accomplish their silicon solutions at reasonable costs if they are prudent in their design selection. A new report from Semico Research, Silicon and Software Design Cost Analysis: The Impact of AI in EDA Tools (SC103-20), states that the average silicon design cost for SoCs across all geometries was $4.8M in 2019.
 
"The introduction of EDA tools that include some level of AI functionality aimed at making designers more efficient and productive in their design efforts is a promising trend. As we have seen with other types of design tools introduced to the market, once deployed there is a continual improvement in performance and functionality," says Rich Wawrzyniak, Principal Market Analyst for ASIC & SoC at Semico. "It is reasonable to expect the same from the new AI-empowered EDA tools with continual improvements being offered to designers. We believe this will be especially notable in the areas of SPICE modeling, simulation, verification and architectural exploration."

In a unique, insightful look at this constantly evolving market, Semico Research's new report, Silicon and Software Design Cost Analysis: The Impact of AI in EDA Tools (SC103-20), examines the primary forces and integration pressures that are driving this market today in 136 pages, with 46 tables and 76 graphs.